Question No. 1:
a. Suppose architecture A has 14-bit address bus. What is maximum size of memory that can be accessed in this architecture? (Show the steps for calculating maximum accessible memory) (5 marks)
Memory accessed = 2 no. of bits
214 =16384
16384/1024 = 16KB
b. An architecture B has a maximum limit of 2GB memory. How many address bits are required for this architecture? (Show the steps for calculating required number of address bits) (5 marks)
2GB*1024=2048 MB
2048*1024=2097152 KB
2097152*1024=2147483648 Bytes
No. of bits = log2 (2147483648)
No. of bits = 31 bits
Question No. 2:
What are the first and the last physical memory addresses accessible using the following segment values? (2 mark each)
- 0000
First address = 00000 + 00000 =00000
Last address = 00000 + 0FFFF =0FFFF
- FFFF
First address = FFFF0 + 00000 = FFFF0
Last address = FFFF0 + 0FFFF = 0FFEF
Question No. 3:
Calculate physical address using the following segment offset pairs.
(1 mark each)
- ABCD:1234 = ABCD0 + 01234 = ACF04
- 1234:ABCD = 12340 + 0ABCD = 1CF0D
Question No. 4:
What is effective address generated by the following instructions? Every instruction is independent of others. Initially BX = 0xFF00, SI=0x00FF
(1 mark each)
- mov ax, [BX+SI]
BX+SI =0xFF00 + 0x00FF = 0XFFFF
= 0XFFFF
- mov ax, [BX+1024] (1024 is in decimal)
BX+1024=0xFF00 + 0X400 = 0x0300
= 0x0300
Question No. 5:
What are the contents of memory locations 720, 721, 722 and 723 if the word 4321 is stored at offset 720 and the word 8765 is stored at the offset 722 using Big Endean format? (2 marks)
Address | Contents |
… | |
0x720 | 43 |
0x721 | 21 |
0x722 | 87 |
0x723 | 65 |
… |
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